■DSDT定義修正詳細
1. Basic Changes
DSDT定義における基本的な修正箇所（必須）
1. CPU Section requires removing alias's otherwise you have a CPUS=1 scenario on your hands.
Rename the P001 section to have the cpus show up correctly in ioregistry
Before:
Scope (_PR)
{
Processor (P001, 0x01, 0x00004010, 0x06) {}
Alias (P001, CPU1)
}
After:
Scope (_PR)
{
Processor (P001, 0x01, 0x00004010, 0x06) {}
}
It repeats from P002 toP004.
2. HPET
Before:
If (LEqual (OSFL (), Zero))
{
If (LEqual (NVID, 0x10DE))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Else
{
Return (Zero)
}
After:
Return (0x0F)
3. RTC0 modified - removed IRQNoFlags
IRQNoFlags ()
{8}
Before:
If (LEqual (^^HPET.NVID, 0x10DE))
{
Return (CRS1)
}
After:
Return (CRS1)
4. TMR modified - removed IRQNoFlags
IRQNoFlags ()
{0}
Before:
If (LEqual (^^HPET.NVID, 0x10DE))
{
Return (CRS1)
}
After:
Return (CRS1)
5. PIC modified - removed IRQNoFlags
IRQNoFlags ()
{2}
6. Search and Replace Acquire (MUTE, 0x03E8) with Acquire (MUTE, 0xFFFF)
7. Search and Replace Acquire (MUTE, 0x0FFF) with Acquire (MUTE, 0xFFFF)
8. Reject warning - add return value on below section Metohd
Method (MP0P, 1, NotSerialized)
Method (MP1P, 1, NotSerialized)
Method (MPCR, 1, NotSerialized)
Method (MP0N, 1, NotSerialized)
Method (MP1N, 1, NotSerialized)
Method (MCRB, 1, NotSerialized)
Method (MCRS, 1, NotSerialized)
Method (MCDB, 1, NotSerialized)
Method (MCDC, 1, NotSerialized)
Method (GAPR, 0, NotSerialized)
Method (ROPO, 1, NotSerialized)
Method (WMNV, 3, NotSerialized)
Return (Zero)
2. Further Changes part1.
MCP7A(GeForce9300/9400/ION)採用の機種では以下の変更が有効(Mac miniのDSDTを参考)。
1. HDEF
a. Search and Replace HDAC with HDEF
2. USB
a. Search and Replace USB0 with OHC1 (0x0aa5)
b. Search and Replace US15 with OHC2 (0x0aa7)
c. Search and Replace USB2 with EHC1 (0x0aa6)
d. Search and Replace US12 with EHC2 (0x0aa9)
3. SATA
a. Search and Replace ATA0 with SATA
4. SBUS
a. Search and Replace SMB0 with SBUS
5. TRIM
a. Search and Replace TRM0 with TRIM
6. P4MI, NVPM
These don't have a matching entry in the default DSDT.
We add stubs so they are recognized.
Place the following above Device (OHC1)
Device (P4MI)
{
Name (_ADR, 0x00030003)
}
Device (NVPM)
{
Name (_ADR, 0x00030005)
}
7. GIGE
a. Search and Replace NMAC with GIGE
8. RP04
a. Search and Replace P0P6 with RP04
(that's P zero P6 and RP zero 4)
9. LPC
a. Search and Replace SBRG with LPCB
10. LPC Devices
a. Search and Replace DMAD with DMAC
b. Search and Replace RTC0 with RTC
c. Search and Replace OMSC with LDRC
d. Search and Replace COPR with MATH
e. Search and Replace (PIC) with (IPIC)
f. Search and Replace TMR with TIMR
g. Search and Replace RMSC with SMC
11. MCH
add the following above RP04 section
Device (MCH2)
{
Name (_ADR, 0x00000001)
}
Device (MCHC)
{
Name (_ADR, Zero)
}
12. Darwin
added check for ‘Darwin’ OS
13. PWRB
added PWRB fix HID->CID
3. Further Changes part2.
Core 2 DuoのEIST(SpeedStep)を有効にする設定
1. DTGP Method
Add above Method (_WAK, 1, NotSerialized)
Method (DTGP, 5, NotSerialized)
{
If (LEqual (Arg0, Buffer (0x10)
{
/* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,
/* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
}))
{
If (LEqual (Arg1, One))
{
If (LEqual (Arg2, Zero))
{
Store (Buffer (One)
{
0x03
}, Arg4)
Return (One)
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
}
Store (Buffer (One)
{
0x00
}, Arg4)
Return (Zero)
}
2. EIST support
a. Add external values
External (PDC0)
External (CFGD)
b. Add above Method (DTGP, 5, NotSerialized)
Method (GCST, 0, NotSerialized)
{
If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
))))
{
Return (Package (0x02)
{
One,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
0x9D,
0x03E8
}
})
}
If (And (PDC0, 0x0300))
{
If (And (CFGD, 0x20))
{
Return (Package (0x03)
{
0x02,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
One,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
,)
},
0x02,
One,
0x01F4
}
})
}
}
If (And (CFGD, 0x20))
{
Return (Package (0x03)
{
0x02,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
One,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x000000000000000C, // Address
,)
},
0x02,
One,
0x01F4
}
})
}
Return (Package (0x02)
{
One,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
,)
},
One,
One,
0x03E8
}
})
}
c. Modfiy processer scope
Scope(_PR)
{
Processor (P001, 0x01, 0x00004010, 0x06)
{
Method (_CST, 0, NotSerialized)
{
Return (GCST ())
}
}
Processor (P002, 0x02, 0x00000000, 0x00)
{
Method (_CST, 0, NotSerialized)
{
Return (GCST ())
}
}
Processor (P003, 0x03, 0x00000000, 0x00)
{
Method (_CST, 0, NotSerialized)
{
Return (GCST ())
}
}
Processor (P004, 0x04, 0x00000000, 0x00)
{
Method (_CST, 0, NotSerialized)
{
Return (GCST ())
}
}
}
最終更新：2010年06月10日 00:33
